1. Field of the Invention
The present invention relates to a method for production of a semiconductor package including conduction processing of through holes in an electronic circuit board.
2. Description of the Related Art
Today, a large variety of semiconductor packages are being used. Even looking at just the electronic circuit boards constituting their basic structures, there are Si and other semiconductor wafers and chips formed with semiconductor circuits and also Si interposers, glass boards, ceramic boards, plastic boards (printed circuit boards, films, etc.) and a large number of other types of boards being used.
To produce a semiconductor package, processing is frequently performed for providing conduction of through holes passing through such electronic circuit boards. The quality and efficiency of the same have extremely important significance in terms of the performance and durability of the semiconductor package and cost.
In the past, through hole connection processing was performed by electroplating the through hole or filling same with a conductive paste. For example, Japanese Unexamined Patent Publication (Kokai) No. 1-258457 describes through hole conduction processing using electroplating. However, conduction processing using electroplating suffers from the problems of an uneven state of plating depending upon the position of the through holes, relief shapes at the plated surfaces at the ends of the through holes, susceptibility to residual voids inside the through holes and other such problems in quality and also long plating times, troublesome maintenance and management due to plating by wet processing, complicated processing steps requiring masking, mask peeling, etc. and other problems in efficiency. Filling conductive paste has similar problems.
As another method for providing conduction between the two sides of a board through a through hole, Japanese Unexamined Patent Publication (Kokai) No. 2001-3081 22 describes method of inserting a capillary of wire bonding tool into the through hole of the board, wire bonding to an underlying electrode, and leading out a gold wire through the through hole for conduction.
However, this method requires an underlying electrode forming the bottom surface of the through hole, and so is limited to the specific cases of using such a structure. Consequently, it cannot be applied to general through holes open at the two ends. Further, this is predicated on it being possible to insert the capillary of a wire bonding tool into the through hole, so the thickness of the tip of the capillary is limited or the through hole is limited to a large diameter case, so this is not suitable for reducing the size of the semiconductor package—which would require finer through holes.
Further, Japanese Unexamined Patent Publication (Kokai) No. 2000-286304 describes a method of production of a semiconductor package comprising positioning a semiconductor chip with a circuit board having a projection at the position of the through hole of its electrode and connecting them by inserting the projecting electrode into the through hole for conduction processing of the through hole.
This method, however, is a method for flip-chip mounting and requires a circuit board having a projection at the position of the through hole of the electrode of the semiconductor chip and stacks the semiconductor chip and circuit board all together, so does not allow individual conduction processing for through holes at any locations.